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simd/archsimd: add package doc
Cherry-pick CL 728560 from the dev.simd branch, for Go 1.26. Change-Id: I9d353769861b35cc808458aa66d243240c235c9f Reviewed-on: https://go-review.googlesource.com/c/go/+/729221 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Auto-Submit: David Chase <drchase@google.com> Reviewed-by: David Chase <drchase@google.com>
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src/simd/archsimd/doc.go
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src/simd/archsimd/doc.go
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// Copyright 2025 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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//go:build goexperiment.simd
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// Package archsimd provides access to architecture-specific SIMD operations.
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//
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// This is a low-level package that exposes hardware-specific functionality.
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// It currently supports AMD64.
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//
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// This package is experimental, and not subject to the Go 1 compatibility promise.
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// It only exists when building with the GOEXPERIMENT=simd environment variable set.
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//
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// # Vector types and operations
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//
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// Vector types are defined as structs, such as Int8x16 and Float64x8, corresponding
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// to the hardware's vector registers. On AMD64, 128-, 256-, and 512-bit vectors are
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// supported.
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//
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// Mask types are defined similarly, such as Mask8x16, and are represented as
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// opaque types, handling the differences in the underlying representations.
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// A mask can be converted to/from the corresponding integer vector type, or
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// to/from a bitmask.
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//
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// Operations are mostly defined as methods on the vector types. Most of them
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// are compiler intrinsics and correspond directly to hardware instructions.
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//
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// Common operations include:
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// - Load/Store: Load a vector from memory or store a vector to memory.
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// - Arithmetic: Add, Sub, Mul, etc.
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// - Bitwise: And, Or, Xor, etc.
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// - Comparison: Equal, Greater, etc., which produce a mask.
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// - Conversion: Convert between different vector types.
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// - Field selection and rearrangement: GetElem, Permute, etc.
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// - Masking: Masked, Merge.
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//
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// The compiler recognizes certain patterns of operations and may optimize
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// them to more performant instructions. For example, on AVX512, an Add operation
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// followed by Masked may be optimized to a masked add instruction.
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// For this reason, not all hardware instructions are available as APIs.
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//
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// # CPU feature checks
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//
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// The package provides global variables to check for CPU features available
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// at runtime. For example, on AMD64, the [X86] variable provides methods to
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// check for AVX2, AVX512, etc.
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// It is recommended to check for CPU features before using the corresponding
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// vector operations.
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//
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// # Notes
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//
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// - This package is not portable, as the available types and operations depend
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// on the target architecture. It is not recommended to expose the SIMD types
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// defined in this package in public APIs.
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// - For performance reasons, it is recommended to use the vector types directly
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// as values. It is not recommended to take the address of a vector type,
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// allocate it in the heap, or put it in an aggregate type.
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package archsimd
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// BUG(cherry): Using a vector type as a type parameter may not work.
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// BUG(cherry): Using reflect Call to call a vector function/method may not work.
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